An integrated circuit (“IC”) or micro-electromechanical system (“MEMS”) is typically packaged using one or more bonding techniques. In conventional wafer bonding using solder, eutectic alloy or metal-to-metal thermo-compression bonds, heat is transferred to the wafer by conduction or convection. There are two main disadvantages in using these heat transfer methods: it takes several minutes for the wafer to reach the required bonding temperature; and the entire wafer is heated to the bonding temperature, thereby stressing devices (e.g., IC and MEMS devices) fabricated on the wafer.
To provide rapid localized heating in wafer bonding, a micro-heater (also known as a micro-strip heater) may be used. The micro-heater is formed by depositing an electrically conductive heating track, often a loop, onto a first substrate such that the heating track is formed in the area of the intended bond between the first substrate and a second substrate (sometimes denoted as a “lid”). The heating track has two contact pads that allow electrical connection between an external power source and the micro-heater; this power source supplies current that passes through the heating track and generates heat such that a bond is formed between the first and second substrates. The micro-heater restricts heating to the area of the intended bond, which may be surrounded by insulating materials.
By way of example, FIG. 1 shows a cross-section through a prior art package 10 during encapsulation of a device 14 within a cavity 18 formed by bonding of a silicon substrate 12 to a second substrate 16 using a poly-silicon micro-heater 24. Device 14 is, for example, an IC or MEMS device created, respectively, using an IC or MEMS fabrication process.
Micro-heater 24 is deposited onto substrate 12 with a heating track 25 at locations 20 and 22 such that heating track 25 is in contact with silicon substrate 12 and second substrate 16. Micro-heater 24 has contact areas 26 and 28 that facilitate connection to probes 30 and 32, respectively, of an external power source 34. Second substrate 16 is held in intimate contact with heating track 25 (and silicon substrate 12) by forces indicated by arrows 36 and 38. Power source 34 passes current through heating track 25 (via probes 30 and 32 and contact pads 26 and 28) such that heating track 25 generates heat that bonds substrate 16 to substrate 12 at locations 20 and 22.
FIG. 2 shows a top view of silicon substrate 12, device 14 and micro-heater 24 of FIG. 1 to illustrate contact areas 26, 28 and heating track 25 prior to bonding of second substrate 16 (not shown in FIG. 2). Heating track 25 is positioned to form a bond around device 14, as shown. Accordingly, as shown, a significant percentage of the surface area of silicon substrate 12 is consumed by contact areas 26 and 28 as compared to the area of device 14 and heating track 25; this reduces production yield as described in connection with FIG. 3.
In particular, FIG. 3 shows a prior art wafer 50 with twenty three fabricated devices 14. Each device 14 has a micro-heater 24 that cooperates with the other micro-heaters to simultaneously encapsulate devices 14, as in FIG. 1. To simultaneously encapsulate all individual devices 14 on wafer 50, micro-heaters 24 are connected in parallel to power busses 52 and 54, as shown. Thus, a single second substrate (e.g., second substrate 16) may be bonded to substrate 12 by completion of the electrical circuit to power busses 52 and 54 so that all devices 14 are simultaneously encapsulated.
Power busses 52 and 54 also consume space to facilitate simultaneous encapsulation of each device 14. Space consumed by contact areas 26 and 28 of each micro-heater 24 and/or by busses 52 and 54 represents a significant proportion of wafer 50, and, thus, reduces the yield of devices 14 from wafer 50. Increased yield of devices 14 from wafer 50 is desirable.